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» DVM Test Report: Steady-State|Steady-State|Vin Maximum|70%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Maximum|70%
Date / Time 4/18/2013 11:00:26 AM
Report Directory DVM_REPORTS\2013-04-18-10_58_35_AM\Steady-State\Steady-State\Vin Maximum\70%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 73.4874%
Efficiency_Max 73.4874%
Frequency(CLK) 955.64301kHertz
Power(LOAD123) 1.58163
Power(SRC) 2.15225
ILOAD123
AVG
1.05046
MIN
1.04744
MAX
1.053
RMS
1.05046
ILOUT
AVG
1.05046
MIN
749.019m
MAX
1.35822
RMS
1.0651
ISRC
AVG
391.396m
MIN
465.859u
MAX
1.35868
RMS
652.233m
SW
AVG
1.6107
MIN
-1.24328
MAX
5.19945
RMS
3.10342
VLOAD123
AVG
1.50565
MIN
1.50132
MAX
1.50929
RMS
1.50566
PK2PK
7.97424m
VOUT
AVG
1.50565
MIN
1.50132
MAX
1.50929
RMS
1.50566
VSRC
AVG
5.49961
MIN
5.49864
MAX
5.5
RMS
5.49961
Measured Spec Values
Max_VLOAD123 PASS: Max. Output1 Voltage (1.50929) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD123 PASS: Min. Output1 Voltage (1.50132) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD123
VLOAD123
ILOAD123
SXGPH File simplis_pop72_2528.sxgph
SRC
ISRC
VSRC
SXGPH File simplis_pop72_2518.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop72_2523.sxgph
Other SXGPH Files
clock#pop simplis_pop72_2510.sxgph