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» DVM Test Report: Steady-State|Steady-State|Vin Minimum|100%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Minimum|100%
Date / Time 4/18/2013 11:01:53 AM
Report Directory DVM_REPORTS\2013-04-18-10_58_35_AM\Steady-State\Steady-State\Vin Minimum\100%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 66.4235%
Efficiency_Min 66.4235%
Frequency(CLK) 929.6458kHertz
Power(LOAD123) 2.09506
Power(SRC) 3.15409
ILOAD123
AVG
1.44503
MIN
1.4413
MAX
1.44867
RMS
1.44503
ILOUT
AVG
1.44503
MIN
1.1708
MAX
1.72001
RMS
1.45371
ISRC
AVG
701.138m
MIN
381.375u
MAX
1.72039
RMS
1.01456
SW
AVG
1.59434
MIN
-1.388
MAX
4.03037
RMS
2.75502
VLOAD123
AVG
1.44984
MIN
1.4461
MAX
1.45349
RMS
1.44984
PK2PK
7.39072m
VOUT
AVG
1.44984
MIN
1.4461
MAX
1.45349
RMS
1.44984
VSRC
AVG
4.4993
MIN
4.49828
MAX
4.5
RMS
4.4993
Measured Spec Values
Max_VLOAD123 PASS: Max. Output1 Voltage (1.45349) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD123 PASS: Min. Output1 Voltage (1.4461) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD123
VLOAD123
ILOAD123
SXGPH File simplis_pop86_3018.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop86_3008.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop86_3013.sxgph
Other SXGPH Files
clock#pop simplis_pop86_3000.sxgph