back to overview ^

» DVM Test Report: Steady-State|Steady-State|Vin Minimum|50%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Minimum|50%
Date / Time 4/18/2013 11:01:17 AM
Report Directory DVM_REPORTS\2013-04-18-10_58_35_AM\Steady-State\Steady-State\Vin Minimum\50%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 79.2892%
Efficiency_Min 79.2892%
Frequency(CLK) 955.64891kHertz
Power(LOAD123) 1.12963
Power(SRC) 1.42469
ILOAD123
AVG
750.292m
MIN
748.501m
MAX
751.897m
RMS
750.293m
ILOUT
AVG
750.292m
MIN
491.68m
MAX
1.01228
RMS
765.212m
ISRC
AVG
316.654m
MIN
381.114u
MAX
1.01266
RMS
498.869m
SW
AVG
1.58061
MIN
-1.10491
MAX
4.30268
RMS
2.72371
VLOAD123
AVG
1.50558
MIN
1.50199
MAX
1.5088
RMS
1.50558
PK2PK
6.81471m
VOUT
AVG
1.50558
MIN
1.50199
MAX
1.5088
RMS
1.50558
VSRC
AVG
4.49968
MIN
4.49899
MAX
4.5
RMS
4.49968
Measured Spec Values
Max_VLOAD123 PASS: Max. Output1 Voltage (1.5088) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD123 PASS: Min. Output1 Voltage (1.50199) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD123
VLOAD123
ILOAD123
SXGPH File simplis_pop81_2843.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop81_2833.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop81_2838.sxgph
Other SXGPH Files
clock#pop simplis_pop81_2825.sxgph