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» DVM Test Report: Steady-State|Steady-State|Vin Minimum|70%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Minimum|70%
Date / Time 4/18/2013 11:01:38 AM
Report Directory DVM_REPORTS\2013-04-18-10_58_35_AM\Steady-State\Steady-State\Vin Minimum\70%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 73.6524%
Efficiency_Min 73.6524%
Frequency(CLK) 955.64264kHertz
Power(LOAD123) 1.58144
Power(SRC) 2.14717
ILOAD123
AVG
1.0504
MIN
1.0479
MAX
1.05274
RMS
1.0504
ILOUT
AVG
1.0504
MIN
786.467m
MAX
1.31636
RMS
1.06149
ISRC
AVG
477.263m
MIN
381.224u
MAX
1.31674
RMS
717.34m
SW
AVG
1.6106
MIN
-1.22654
MAX
4.18448
RMS
2.75711
VLOAD123
AVG
1.50556
MIN
1.50198
MAX
1.50892
RMS
1.50556
PK2PK
6.9365m
VOUT
AVG
1.50556
MIN
1.50198
MAX
1.50892
RMS
1.50556
VSRC
AVG
4.49952
MIN
4.49868
MAX
4.5
RMS
4.49952
Measured Spec Values
Max_VLOAD123 PASS: Max. Output1 Voltage (1.50892) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD123 PASS: Min. Output1 Voltage (1.50198) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD123
VLOAD123
ILOAD123
SXGPH File simplis_pop83_2913.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop83_2903.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop83_2908.sxgph
Other SXGPH Files
clock#pop simplis_pop83_2895.sxgph