back to overview ^
» DVM Test Report: Steady-State|Steady-State|Vin Nominal|50% Load
| Test Details | |
| Schematic | 4.2_LTC3406B - DVM ADVANCED.sxsch |
| Test | Steady-State|Steady-State|Vin Nominal|50% Load |
| Date / Time | 4/18/2013 9:12:34 AM |
| Report Directory | DVM_REPORTS\2013-04-18-9_12_19_AM\Steady-State\Steady-State\Vin Nominal\50% Load |
| Log File | report.txt |
| Screenshot | schematic.png |
| Status | PASS |
| Simulator | simplis |
| Deck | input.deck |
| Init | input.deck.init |
| Measured Scalar Values | |
| Efficiency | 79.1235% |
| Frequency(CLK) | 955.64945kHertz |
| Power(LOAD) | 1.1297 |
| Power(SRC) | 1.42777 |
| ILOAD | AVG 750.315m MIN 748.345m MAX 751.985m RMS 750.316m |
| ILOUT | AVG 750.315m MIN 474.049m MAX 1.03206 RMS 767.43m |
| ISRC | AVG 285.599m MIN 423.431u MAX 1.03248 RMS 475.287m |
| SW | AVG 1.58066 MIN -1.11282 MAX 4.80969 RMS 2.89109 |
| VLOAD | AVG 1.50563 MIN 1.50168 MAX 1.50898 RMS 1.50563 PK2PK 7.30416m |
| VOUT | AVG 1.50563 MIN 1.50168 MAX 1.50898 RMS 1.50563 |
| VSRC | AVG 4.99971 MIN 4.99897 MAX 5 RMS 4.99971 |
| Measured Spec Values | |
| Max_VLOAD | PASS: Max. Output1 Voltage (1.50898) is less than or equal to Max. Output1 Voltage Spec (1.58025) |
| Min_VLOAD | PASS: Min. Output1 Voltage (1.50168) is greater than or equal to Min. Output1 Voltage Spec (1.42975) |
 LOAD
VLOAD
ILOAD
|
|
| SXGPH File | simplis_pop42_1473.sxgph |
 SRC
VSRC
ISRC
|
|
| SXGPH File | simplis_pop42_1463.sxgph |
 default
CLK
ILOUT
SW
VOUT
|
|
| SXGPH File | simplis_pop42_1468.sxgph |
| Other SXGPH Files | |
| clock#pop | simplis_pop42_1455.sxgph |
