» DVM Test Report Overview

General
Schematic 6.3_LTC3406B - DVM ADVANCED.sxsch
Testplan dvm_advanced.testplan
Original Testplan Filename 6.6.1_extractcurve_final.testplan
Date / Time 2013-04-26 2:54:11 PM
Report Directory DVM_REPORTS\2013-04-26-2_54_03_PM
Log File dvm_advanced.log
# of Tests Run 3 of 3 (3 of 3 Run, 1 Passed, 1 Failed, 0 Ran with Warnings, 1 Skipped)
Total Time 13s
Design Specifications
Circuit Name LTC3406B
Description Synchronous Buck
Input 1 5.000 V (4.5 V to 5.5 V)
Output 1 1.505 V (±5%) @ 1.5 A
Switching Frequency 955kHz
Calculated Results
Gain Margin @ 1.505V (dB) 30.3822
Gain Margin @ 600mV (dB) 33.6973
Phase Margin @ 1.505V (deg) 36.9764
Phase Margin @ 600mV (deg) 39.7082
Excel-compatible Results
Scalar Results dvm_advanced_table_scalars.txt
Spec Results dvm_advanced_table_specs.txt
Overview Graphs
Bode Plot Summary
Gain @ 1.505V
Gain @ 600mV
Phase @ 1.505V
Phase @ 600mV
SXGPH File simplis_ac18_1263.sxgph
Source Test Extract Curves from Previous Reports
Test 1 of 3top ^
Test Label VOUT=1.505V|Bode Plot|Vin Nominal|50% Load
Simulator simplis
Test Report VOUT=1.505V\Bode Plot\Vin Nominal\50% Load\report.txt.html
Status PASS
Test Time 5s
Test 2 of 3top ^
Test Label VOUT=0.6V|Bode Plot|Vin Nominal|50% Load
Simulator simplis
Test Report VOUT=0.6V\Bode Plot\Vin Nominal\50% Load\report.txt.html
Status FAIL
Test Time 5s
Test 3 of 3top ^
Test Label Extract Curves from Previous Reports
Simulator N/A
Test Report Extract Curves from Previous Reports\report.txt.html
Status SKIP
Test Time 2s