DVM - Design Verification Module
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DVM - Design Verification Module
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The DC auxiliary source models a simple DC voltage source with series resistance. This source is commonly used to enable and disable AC/DC power supplies in the ControlStartup() Test Objective.
Model Name |
DC Auxiliary Source |
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Simulator |
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This device is compatible with both the SIMetrix and SIMPLIS simulators. |
Parts Selector |
DVM Source Aux. Source |
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Symbol Library |
None - the symbol is automatically generated when placed or edited. |
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Model File |
SIMPLIS_DVM_ADVANCED.lb |
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| Subcircuit Name | SIMPLIS_DVM_ADVANCED_SOURCE_AUX_DC | |
| Schematic |  |
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The following table explains the relevant parameters.
Parameter Name |
Default |
Data Type |
Range |
Units |
Parameter Description |
DC_VOLTAGE |
5 |
Real |
V |
DC voltage of input source |
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SOURCE_NAME |
SRC |
String |
n/a |
n/a |
Name of the DVM source. This name cannot contain spaces. |
SOURCE_RESISTANCE |
0.4 |
Real |
min:0 |
Ω |
Sets the source resistance of the source. |
To set any DVM Aux source to a DC Source subcircuit, place a Dc() testplan entry in the Source column.
The Dc() testplan entry has the following syntax with the arguments explained in the table below.
Dc(REF, DC_VOLTAGE)
| Argument | Range | Description |
REF |
n/a |
The actual reference designator of the Aux DVM source. |
DC_VOLTAGE |
min: 0 |
The DC Voltage of the source.. |
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