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» DVM Test Report: Steady-State|Steady-State|Vin Minimum|90%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Minimum|90%
Date / Time 4/18/2013 11:01:49 AM
Report Directory DVM_REPORTS\2013-04-18-10_58_35_AM\Steady-State\Steady-State\Vin Minimum\90%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 68.7026%
Efficiency_Min 68.7026%
Frequency(CLK) 955.63726kHertz
Power(LOAD123) 2.03323
Power(SRC) 2.95946
ILOAD123
AVG
1.35049
MIN
1.34732
MAX
1.3536
RMS
1.35049
ILOUT
AVG
1.35049
MIN
1.0836
MAX
1.61802
RMS
1.35929
ISRC
AVG
657.858m
MIN
381.334u
MAX
1.6184
RMS
950.542m
SW
AVG
1.64059
MIN
-1.3472
MAX
4.06534
RMS
2.78236
VLOAD123
AVG
1.50554
MIN
1.50201
MAX
1.509
RMS
1.50554
PK2PK
6.99578m
VOUT
AVG
1.50554
MIN
1.50201
MAX
1.509
RMS
1.50554
VSRC
AVG
4.49934
MIN
4.49838
MAX
4.5
RMS
4.49934
Measured Spec Values
Max_VLOAD123 PASS: Max. Output1 Voltage (1.509) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD123 PASS: Min. Output1 Voltage (1.50201) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD123
VLOAD123
ILOAD123
SXGPH File simplis_pop85_2983.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop85_2973.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop85_2978.sxgph
Other SXGPH Files
clock#pop simplis_pop85_2965.sxgph