DVM - Design Verification Module
|
The ramp input source applies a ramp or a step voltage to the input of the circuit under test. The rise time is controlled by the RISE_TIME parameter and the source includes probes for the source voltage and current. This source is used in the StepLine() Test Objective.
Other similar sources include:
In this Topic Hide
Model Name |
Ramp Input Source |
|
Simulator |
This device is compatible with both the SIMetrix and SIMPLIS simulators. |
|
Parts Selector |
DVM Source Input Source |
|
Symbol Library |
None - the symbol is automatically generated when placed or edited. |
|
Model File |
SIMPLIS_DVM_ADVANCED.lb |
|
Subcircuit Name | SIMPLIS_DVM_ADVANCED_SOURCE_RAMP | |
Schematic |
The following table explains the relevant parameters.
Parameter Name |
Default |
Data Type |
Range |
Units |
Parameter Description |
FINAL_VOLTAGE |
12 |
Real |
min: 0 |
V |
The final voltage for the source |
RISE_TIME |
100u |
Real |
min: 0 |
s |
The ramp rise time in seconds |
SOURCE_NAME |
SRC |
String |
n/a |
n/a |
Name of the DVM source. This name cannot contain spaces. |
SOURCE_RESISTANCE |
0.4 |
Real |
min:0 |
Ω |
Sets the source resistance of the source |
START_VOLTAGE |
5 |
Real |
min: 0 |
V |
The starting voltage for the source |
TIME_DELAY |
10u |
Real |
min: 0 |
s |
The time delay before the ramp initiates |
To set any managed DVM source to a Ramp Source subcircuit, place a Ramp() testplan entry in the Source column.
The Ramp() testplan entry has the following syntax with the arguments explained in the table below.
Ramp(REF,
START_VOLTAGE, FINAL_VOLTAGE)
Ramp(REF,
START_VOLTAGE, FINAL_VOLTAGE, OPTIONAL_PARAMETER_STRING)
Argument | Range | Description |
REF |
n/a |
The actual reference designator of the DVM source or the more generic syntax of OUTPUT:n where n is an integer indicating a position in the list of managed DVM sources. |
START_VOLTAGE |
min: 0 |
The starting voltage for the source. This can be a numeric value or a symbolic value, such as a percentage of the nominal input voltage. |
FINAL_VOLTAGE |
min: 0 |
The final voltage for the source. This can be a numeric value or a symbolic value, such as a percentage of the nominal input voltage. |
OPTIONAL_PARAMETER_STRING |
n/a |
Parameter string with timing parameters TIME_DELAY and/or RISE_TIME* |
* If both parameters are specified, join the two parameter key-value pairs with a space, as shown in the example below. The order of the parameter names does not matter.
During a StepLine() test, DVM sets the input to use the Ramp Source subcircuit. Then DVM sets the TIME_DELAY and RISE_TIME parameters for the Ramp Source. You can change the timing with the Ramp() function call by providing the timing parameters as an optional parameter string, which is the fourth argument to the Ramp() function call.
The following example sets the first DVM managed source to a Ramp Source, with a starting voltage of 1V and a final voltage of 5V. The optional parameter string in this example sets the time delay to 25us and the rise time to 100us.
Note: In this examples, the Source column is the first column in the testplan and, therefore, begins with the special three character sequence: *?@.
*?@ Source | ||||
---|---|---|---|---|
Ramp(INPUT:1, 1, 5, TIME_DELAY=25u RISE_TIME=100u) |
The results of this testplan entry are shown below:
Annotation | Parameter Value |
X0 | TIME_DELAY |
X1 | TIME_DELAY + RISE_TIME |
Y0 | START_VOLTAGE |
Y1 | FINAL_VOLTAGE |
© 2015 simplistechnologies.com | All Rights Reserved