DVM - Design Verification Module

AC/DC Test Objectives

DVM has a powerful set of test objectives designed to characterize the performance of AC/DC Converters. These test objectives configure the AC line source, the output load, then run the simulation and measure critical scalar values, such as Power Factor or the peak output voltage during a startup event.

AC/DC testing is different from DC/DC testing for two reasons:

Firstly, AC/DC converters have multiple asynchronous frequencies; that is, the low frequency line voltage and the much higher converter switching frequency.
Secondly, these converters often use a multiplier to compensate for line voltage variations.

Either of those two conditions prevents a SIMPLIS periodic operating point simulation (POP) from converging; therefore, all AC/DC tests use the transient simulation analysis.

Instead of running the POP analysis to find the steady-state operating point, a special transient test function, FindACSteadyState(), is placed in the Objective column to generate a SIMPLIS initialization (.INIT) files.
After the FindACSteadyState() simulation completes, the steady-state operating point is saved as an .INIT file, using the filename specified in the GenerateInitFile column of the testplan. This steady-state operating point is then loaded at the start of each subsequent test, based on the entry in the IncludeInitFile column which contains the same identifier that was in the GenerateInitFile column. At the beginning of each new test, the converter is initialized to the steady-state operating conditions using the .INIT file.

Built-in testplans are provided for single-phase and three-phase converters with a single output. These built-in testplans are ideal for testing any offline converter, either a PFC or an AC/DC rectifier. As with the DC/DC testplans, specifications for the design, including input voltage and output current ranges, are entered into the DVM control symbol.

The AC/DC objectives are listed below.

Objective	Description
FindAcSteadyState()	Captures and saves the initial steady-state conditions in an initialization file for use in other simulations. Configures the input as an AC Fixed Input Source and the output as a Resistive Load.
AcSteadyState()	Measures the steady-state behavior of the supply, including the conducted line spectrum, efficiency, and the power factor. Configures the input as an AC Fixed Input Source and the output as a Resistive Load
ControlStartup()	Determines the converter response to a controlled startup. Configures the input as an AC Fixed Input Source and the control source as a Ramp Auxiliary Source. The output is configured as a Resistive Load.
LineStartup()	Determines the converter response when the line voltage is suddenly switched on. Configures the input as an AC Startup Input Source and the output as a Resistive Load.
LineSurge()	Determines the converter response to a sudden increase in line voltage amplitude. Configures the input as an AC Line Surge/Sag Input Source and the output as a Resistive Load.
LineSag()	Determines the converter response to a sudden decrease in line voltage amplitude. Configures the input as a AC Line Surge/Sag Input Source and the output as a Resistive Load.
LineDropout()	Determines the converter response to a sudden interruption of line voltage. Configures the input as a AC Line Dropout Input Source and the output as a Resistive Load.
LoadTrAC()	Verifies that the output voltage is within regulation; unlike the DC/DC Pulse Load Objective, this uses timing in terms of AC line cycles and the actual phase angle of the source. Configures the input as a AC Fixed Input Source and the output as a Pulse Load - Single Current Pulse.